TSMC Announces 6-nanometer Process


Fully [H]
Apr 10, 2003
TSMC has announced its new 6nm process node that delivers 18% higher logic density over the N7 process while maintaining design rules from TSMC's proven N7 technology. This allows customers to fully migrate over to the new node with a fast design cycle time while reusing the N7 design ecosystem. This should make switching cost effective as only very limited engineering resources are needed for customers to achieve the product benefits from the new technology offering. Scheduled for risk production in the first quarter of 2020, TSMC’s N6 technology provides customers with additional cost-effective benefits while extending the industry-leading power and performance from the 7nm family for a broad array of applications, ranging from high-to-mid end mobile, consumer applications, AI, networking, 5G infrastructure, GPU, and high-performance computing.


TSMC N6 technology will further extend our leadership in delivering product benefits with higher performance and cost advantage beyond the current N7,” said Dr. Kevin Zhang, TSMC Vice President of Business Development. “Building upon the broad success of our 7nm technology, we’re confident that our customers will be able to quickly extract even higher product value from the new offering by leveraging a well-established design ecosystem today.”

TSMC already has a 5nm process that they are testing. I'm hoping Intel or whomever in the USA can match them in the future.
As it gets smaller companies bail on the lower nm sizes. Tsmc may be one of the only one left until we at a new method.