Linus Torvalds On The Importance Of ECC RAM, Calls Out Intel's "Bad Policies" Over ECC

[Mega6]

Regarding the cost, I have always wondered why it is more expensive. It's just transistors.. unless it has some licensing bullshit like RDRAM used to have.

Since when are transistors free?

 

[travm]

ECC is really only needed on servers...

Regarding the cost, I have always wondered why it is more expensive. It's just transistors.. unless it has some licensing bullshit like RDRAM used to have.

Edit: Cool, Memtest86+ finally as a new version after a 7 year hiatus: https://www.memtest.org/#downiso

You realize more transistors is more costs at every step

 

[OutOfPhase]

ECC is really only needed on servers...

Regarding the cost, I have always wondered why it is more expensive. It's just transistors.. unless it has some licensing bullshit like RDRAM used to have.

Edit: Cool, Memtest86+ finally as a new version after a 7 year hiatus: https://www.memtest.org/#downiso

No, ECC isn't only needed on servers. That's actually Linus'es point.

Statistically, people have spurious problems and do not know it. You're very lucky if the bit error results in a crash! Sadly, far more likely something just kinda goes wrong. Hopefully it's in your browser image cache. Something weird, you hit reload, and never notice.
But maybe not. Maybe it is in something you care about in memory, and you save that file to disk, and that bit error will now live on.

Increasing reliability and trust in your data is really a good thing for everyone. I will of course acknowledge the value may or may not seem worth the cost delta. That cost delta would also go down if ECC was more mainstream, and not viewed as an "oh boy, we can call this Enterprise and really boop the profit margin" sort of thing.

And also, happy to see memtest updates. I do and always will have a bootable memtest medium.

 

[LukeTbk]

ECC is really only needed on servers...

Regarding the cost, I have always wondered why it is more expensive. It's just transistors.. unless it has some licensing bullshit like RDRAM used to have.

One obvious reason why an ECC solution cost more is that you need more ram to have the same capacity, a bit like a raid 5 I think there is an around 15% overhead so if you need 32 gig of ram you need to buy actually 36 gig of ram or something like that.

On the platform you could be right that it could in good product line artificial.

 

[toast0]

ECC is really only needed on servers...

You only need ECC if your ram is faulty, but you only know your ram is faulty if you have ECC.

Regarding the cost, I have always wondered why it is more expensive. It's just transistors.. unless it has some licensing bullshit like RDRAM used to have.

Edit: Cool, Memtest86+ finally as a new version after a 7 year hiatus: https://www.memtest.org/#downiso

It's an extra ram chip, and some more data lines. In theory, this should just raise the cost of memory modules by 9/8. But it's more because it's a separate, lower volume, market segment.

 

[PurduEE]

Boot times (used to?) suffer greatly with ECC RAM. When I was a BIOS guy back in the day, I constantly monkeyed with our zero-writing algorithm to clear ECC memory so the bit flips could be detected. I can imagine your run of the mill customer being upset about how long boot takes on such a system...

 

[Red Falcon]

One obvious reason why an ECC solution cost more is that you need more ram to have the same capacity, a bit like a raid 5 I think there is an around 15% overhead so if you need 32 gig of ram you need to buy actually 36 gig of ram or something like that.

On the platform you could be right that it could in good product line artificial.

That isn't a thing.
The overhead you might be speaking of isn't the data capacity, but rather the overhead on the data transfer speed since ECC does eat a small amount of the data transfer rate.

 

[LukeTbk]

That isn't a thing.
The overhead you might be speaking of isn't the data capacity, but rather the overhead on the data transfer speed since ECC does eat a small amount of the data transfer rate.

A ok, I thought that:
https://lph.ece.utexas.edu/merez/uploads/MattanErez/sc15_frugal.pdf

off redundant storage, bandwidth, and energy for increased reliability. ECC memories typically employ ECC DIMM (Dual In-line Memory Modules) that have 12.5% more DRAM chips than non-ECC DIMMs; hence ECC typically adds a 12.5% capacity, bandwidth, and energy overheads

Meant they needed an extra dram every 8 dram chips.

Wikipedia seem to be saying the same:
https://en.wikipedia.org/wiki/ECC_memory

ECC DIMMs typically have nine memory chips on each side, one more than usually found on non-ECC DIMMs

They seem to be storing extra bits for parity to detect change over time over something:
This problem can be mitigated by using DRAM modules that include extra memory bits and memory controllers that exploit these bits. These extra bits are used to record parity or to use an error-correcting code (ECC). Parity allows the detection of all single-bit errors

I could be mixing everything up.

 

[Red Falcon]

A ok, I thought that:
https://lph.ece.utexas.edu/merez/uploads/MattanErez/sc15_frugal.pdf

off redundant storage, bandwidth, and energy for increased reliability. ECC memories typically employ ECC DIMM (Dual In-line Memory Modules) that have 12.5% more DRAM chips than non-ECC DIMMs; hence ECC typically adds a 12.5% capacity, bandwidth, and energy overheads

Meant they needed an extra dram every 8 dram chips.

Wikipedia seem to be saying the same:
https://en.wikipedia.org/wiki/ECC_memory

ECC DIMMs typically have nine memory chips on each side, one more than usually found on non-ECC DIMMs

They seem to be storing extra bits for parity to detect change over time over something:
This problem can be mitigated by using DRAM modules that include extra memory bits and memory controllers that exploit these bits. These extra bits are used to record parity or to use an error-correcting code (ECC). Parity allows the detection of all single-bit errors

I could be mixing everything up.

Ah, that makes sense, especially for the additional eight memory lines (8-bit) needed for ECC.
Good call.