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First off for Microsoft, VMWare, and Citrix you only pay for the physical cores not the virtual cores (and the first 16 physical cores are included in the base license), secondly this allows you to dramatically decrease the number of sockets and even machines all together. Why run 2 dual socket servers when you can run 1 single socket server in its place. Once you get them running you then virtualize your individual servers and the licensing there is only paid based on the number of cores you assign to the individual VM's. When all is said and done it usually ends up being cheaper. The bonuses from decreased power consumption from the server and its associated cooling systems is just icing on the cake.
Yeah more and more I am finding even on my 4 of 5 year old servers they are scaling very well with the software upgrades to the point where CPU usage has dropped significantly but the HDD's are getting worked double time, I have had to do more to upgrade from gigabit to SFP+ fiber modules and SSD's than increasing CPU counts. Just keeping the general core count the same has worked wonders with just the better per core performance of the newer parts and throwing more RAM in there for good measure. My costs are way down with this trend.
Finally enough CPU for VRchat
Technology changed a lot. Expansion cards in the past had limited memory and processing power, and leaned heavily on the cpu and main memory. Having a cache and controller between the expansion cards, cpu, and memory made sense because of the bandwidth and latency limitations of the time. Once busses became faster and components started having more local memory, it made more sense to have the memory controller and caches as close to the cpu as possible. As process sizes shrunk, more components could be squeezed close together and latency went down. Now the cost isn't as high to have the memory controller on a separate chip, but you still want it close to the cpu to keep latency down.
.. Basically that seems to me overly complex and a far, far too large socket with too much latency.
The utter silence has been AMD going on about active interposer briefly then absolute crickets. I think that's the secret sauce here, if not this release, for Zen3 for sure. I really want to know if they are using active interposer to allow for 8 core CCX and maybe even two 8 core CCX per die with the savings from dropping interconnections mostly to the active interposer. When you combined the die shrink and lack of IF then you have the room and perf advantage..
That would be a significant upgrade and the most sense. Vs individual 8 dies as per Charlies stupid leak. Yeah, they will screw the latency and complexity and cost into a ditch with 8 dies... come on Charlie. Over twice the failure rate of Epyc potentially when you start doing twice the dies, I'm sure a statistician will be here to correct my shitty math soon
But, if they have done the massive L3 with an 8 core CCX for now on an active interposer it will give great gains as well.
Either way will be interesting but I'm holding out for 2x8 core CCX per die. It would make TR-style Zen cores possible but with the TR WX memory controller limitation.
The utter silence has been AMD going on about active interposer briefly then absolute crickets. I think that's the secret sauce here, if not this release, for Zen3 for sure. I really want to know if they are using active interposer to allow for 8 core CCX and maybe even two 8 core CCX per die with the savings from dropping interconnections mostly to the active interposer. When you combined the die shrink and lack of IF then you have the room and perf advantage..
That would be a significant upgrade and the most sense. Vs individual 8 dies as per Charlies stupid leak. Yeah, they will screw the latency and complexity and cost into a ditch with 8 dies... come on Charlie. Over twice the failure rate of Epyc potentially when you start doing twice the dies, I'm sure a statistician will be here to correct my shitty math soon
But, if they have done the massive L3 with an 8 core CCX for now on an active interposer it will give great gains as well.
Either way will be interesting but I'm holding out for 2x8 core CCX per die. It would make TR-style Zen cores possible but with the TR WX memory controller limitation.
Thinking about it, maybe they bought the wrong license by mistake?
Sure, but for Zen size, it's already small. Barely 200mm².. even 7nm will have decent yields.