A 32-BIT RISC-V CPU CORE IN 600 LINES OF C

[erek]

This is awesome

"If you have ever wanted to implement a RISC-V CPU core in about 600 lines of C, you’re in luck! [mnurzia]’s rv project does exactly that, providing a simple two-function API.
Technically, it’s a user-level RV32IMC implementation in ANSI C. There are many different possible flavors of RISC-V, and in this case is a 32-bit base integer instruction set (RV32I), with multiplication and division extension (M), and compressed instruction set extension (C).
There’s a full instruction list and examples of use on the GitHub repository. As for readers wondering what something like RISC-V emulation might be good for, it happens to be the not-so-secret sauce to running Linux on an RP2040.
Posted in Software HacksTagged ANSI C, emulator, risc, RISC-V"

Source: https://hackaday.com/2023/06/24/a-32-bit-risc-v-cpu-core-in-600-lines-of-c/

 

[rflcptr]

Thanks for sharing this.

 

[erek]

Thanks for sharing this.

you're welcome, RISC-V pwns

 

[1_rick]

You done anything with risc-v, erek?

 

[Red Falcon]

you're welcome, RISC-V pwns

You should have a RISC-V system in your sig.
If only you were this enthusiastic about ARM...

 

[The Mad Atheist]

Who doesn't love C?

 

[Red Falcon]

Who doesn't love C?

 

[erek]

Who doesn't love C?

View attachment 579594

The Gibson ran on RISC microarchitectures

 

[Red Falcon]

The Gibson ran on RISC microarchitectures

Heck yeah, who wouldn't want Penn and The Plague as co-workers!

 

[erek]

tiny RISC-V Router ?? only 5x5cm#RISCV