At the RISC-V Summit, Western Digital's Chief Technology Officer Martin Fink unveiled plans to release a new open source RISC-V core, an open standard initiative for cache coherent memory over a network, and an open source RISC-V instruction set simulator. The RISC-V SweRV Core is a 2-way...
An article from Barron's details a conference call about RISC-V. RISC-V is a non-profit foundation founded by U.C. Berkeley professor David Patterson and his team to create one single “instruction set architecture” that can be used across all manner of chips, from the humblest embedded part on...