16mb

https://www.techpowerup.com/249952/amd-doubles-l3-cache-per-ccx-with-zen-2-rome Sisoft leak of an ES shows 16mb x 16 per socket for a 2P system, which should mean that it's 2x 16mb cache per chiplet, meaning 4 core CCX is still sadly likely. Or perhaps it counts the IO chip mirroring cache...