erek
[H]F Junkie
- Joined
- Dec 19, 2005
- Messages
- 10,573
It's gettin there
"Today's kernel patches focus on supporting the hardware page table walker (PTW). As PTW can handle all fast paths of TLBI/TLBL/TLBS/TLBM exceptions by hardware, software only needs to handle slow paths such as page faults. Additionally, in the past, LoongArch utilized "dbar 0" as a complete barrier for all operations. However, this full completion barrier severely impacted performance. As a result, Loongson-3A6000 and subsequent processors have introduced various alternative hints. Loongson plans to ship samples to select customers in the first half of 2023, so we could see more information surfacing soon."
Source: https://www.techpowerup.com/308738/...-compete-with-intel-willow-cove-and-amd-zen-3
"Today's kernel patches focus on supporting the hardware page table walker (PTW). As PTW can handle all fast paths of TLBI/TLBL/TLBS/TLBM exceptions by hardware, software only needs to handle slow paths such as page faults. Additionally, in the past, LoongArch utilized "dbar 0" as a complete barrier for all operations. However, this full completion barrier severely impacted performance. As a result, Loongson-3A6000 and subsequent processors have introduced various alternative hints. Loongson plans to ship samples to select customers in the first half of 2023, so we could see more information surfacing soon."

Source: https://www.techpowerup.com/308738/...-compete-with-intel-willow-cove-and-amd-zen-3