Kit is a quad-set of GSkill TridentZ B-Die 3200 C14's -- 4x8GB. Upped voltage to 1.4 and can boot and stable 3400 with XMP profile. Probably needs 1.45 for CL14 at 3600... and beyond (3800 might be a stretch at CL14 -- might be possible at 15 or 16).
Haven't tinkered too much yet. :D Having too...
Made the jump from a 2700X to a 5800X3D for 1440p.
Drop in upgrade with a BIOS update. Seems like a no brainer to extend performance on same platform from Zen+
-30 all-core offset using the offset tool until BIOS updates. Offset helps with temps at idle (down to 32) on a 360 AIO and gaming...
2600x w/ 1080.
I may be biased. :P
AM4 supposed to be Ryzen 3xxx friendly, but I'd guess that it's the quality of the VRMs that will limit CPU support for the next-gen upper tier CPU's on the X470 boards + BIOS updates from a reputable manufacturer.... but that's pure conjecture at this point...
Many good times were had with a MyComp/TMC TI5VGF and an AMD K6-3 450.... and that awesome 4-in-1 VIA driver package on Win98 :(...
https://www.anandtech.com/show/223
/s
Was thinking "BE" in the respect of some type of top-end / halo SKU of the R7 family.... as I would guess that the "FX" moniker is to be buried along with the previous gen stuff.
And agree on that halo/HEDT piece... the chipsets aren't there yet, but simply a I'd say a function of time and...
Also.. here's a thought... what if AMD were to "halo" one of their new Naples/Snowy Owl's as an R7 HEDT or "R9" variant in the family like the 6800K/6900K options from Intel and re-work an improved X370 with quad channel memory support?
Or could we see the return of the Black Edition R7 to be...
CCX being a cluster of 4 cores and 8MB L3, the question would be is the 6C R5 2x CCX's with 3/4 operational cores sharing L3 (ie: failed R7 QC on 1 of the members of the each CCX).
More importantly, is the CCX on the 4C R3 a set of 2x CCX's with 2/4 operational cores sharing L3 cache or a...
I'm excited that we as customers have 2 viable choices again in the CPU realm --- PC power advanced rapidly when Intel and AMD were neck and neck in the ~500 MHz+ days of K7/TBird & P3 Katmai/Coppermine and customers had a choice between platforms that leap-frogged each other all the time.
Maybe...
First glance, and I could be dead wrong on this. :)
NNP looks like its centered in the branch prediction portion of the core -- so maybe some type of hashing table internally for instructions with counters as well as addresses/data in the load/store queues for cached fetches (maybe also...